Changes relevant to Intel XPU

SGLang v0.5.14 lists a SYCL implementation of mRoPE for XPU devices and an update of the PyTorch XPU dependency to 2.12. These are the specific Intel-related changes recorded in the upstream release notes.

The same release adds support for models including GLM-5.2 and LiquidAI LFM2.5. Model support and device support need to be read together: an entry in the general model list does not establish that every model configuration runs on an Arc card. The release separates several of its changes by hardware backend.

What the INT8 checkpoint pool stores

The prefix-cache change in pull request #28185 concerns recurrent states used by KDA and Gated DeltaNet models. It introduces a separate pool that stores cached states in INT8, while active computation continues to use BF16 working memory. The option is disabled by default.

This gives cached prefixes their own storage budget. A reused state is restored into the active pool when needed. The change concerns the representation of cached recurrent states; the model’s weight format is a separate choice.

Reading the release for an Arc setup

For an Arc installation, I would first match the model architecture, XPU dependency versions and chosen cache mode to the intended configuration. These release notes identify changes to investigate. A throughput or latency comparison still needs measurements from the same model, workload and hardware configuration, with the cache state recorded.